1. Field of the Invention
The present invention relates generally to a secondary battery cell protection circuit, and more particularly, to a lithium-ion battery cell protection circuit capable of shutting down a charge circuit when a charge voltage in excess of a predetermined voltage is applied.
2. Description of the Related Art
Compared to the conventional nickel-cadmium battery cell or nickel-hydrogen battery, the light, compact lithium-ion battery that is one type of secondary battery cell delivers approximately three times as much operating voltage, approximately twice as much power per unit of weight and substantially greater power per unit of volume as well. The power, lightness and compactness of the lithium-ion battery cell has led to its widespread use in video cameras, portable telephones, PHS, notebook-type personal computers and a wide array of other portable electronic products.
In order to ensure the safety and enhance the performance of these light, compact but powerful battery cells, protection circuits are used.
FIG. 1 shows the circuit conventionally used to protect secondary battery cells such as the lithium-ion battery cell. This circuit has a battery cell protection circuit 20, resistors R1-R3, capacitors C1-C3, discharge control field-effect transistor (hereinafter FET) Q1 and charge control FET Q2. Either a charger or a load is connected between terminal +B and terminal -B.
The battery cell protection circuit 20 has an over-current detection circuit 10, an over-discharge detection circuit 11, a discharge control unit dead time circuit 12, a charge/load detection circuit 13, an over-charge detection circuit 14, a dead time setting circuit and a charge control FET drive transistor TR1.
The VCC terminal of the battery cell protection circuit 20 is connected to the positive terminal of the secondary battery cell 1 via resistor R1 and capacitor C1.
The GND terminal is the terminal connected to the negative terminal of the secondary battery cell 1 and is also the battery cell protection circuit 20 ground terminal (standard power terminal).
The DO terminal is the discharge control FET Q1 drive output terminal. When there is an over-discharge the output appearing at the DO terminal turns the discharge control FET Q1 OFF, the charge/discharge path 30 is cut and the discharge stopped.
The VM terminal is an over-current detection terminal, and is connected to the -B terminal via resistor R3.
The TD terminal is the charge control dead time setting terminal. This TD terminal is grounded via capacitor C2. This capacitor C2 is connected to the dead time setting circuit 15 and determines the dead time of the over-charge detection circuit 14.
The CO terminal is the drive output terminal for the charge control FET Q2. When the over-charge detection circuit 14 detects an overcharge, transistor TR1 is shut OFF, a LOW-level signal is applied to the CO terminal, that LOW-level signal is applied to the gate of the charge control FET Q2 and the charge control FET Q2 turns OFF. When the charge control FET Q2 turns OFF, one charge-discharge path consisting of the negative terminal of the secondary battery and the -B terminal discharge path 30 is cut and charging stops.
The over-discharge detection circuit 11 detects the voltage at the VCC terminal and, if the voltage detected at the VCC terminal meets or exceeds an over-discharge detection voltage V.sub.s of, for example, 2.3 V, maintains a state of operation. If the VCC terminal voltage is less than an over-discharge voltage V.sub.s the over-discharge detection circuit 11 outputs an over-discharge detection signal to the DO terminal, turns the discharge control FET Q1 OFF and stops the discharge.
In order to prevent repeated starting and stopping of the discharge, the over-discharge detection circuit 11 is set so that a shift to a normal mode, that is, a state in which there is no over-discharge, is carried out at a voltage exceeding the over-discharge voltage V.sub.s. That is, the over-discharge detection circuit 11 has a hysteresis characteristic, in that the stopping of the discharge is carried out at the over-discharge voltage V.sub.s and the shift to a normal mode is carried out at a voltage larger than the over-discharge voltage V.sub.s.
In addition, although the over-discharge detection circuit 11 determines whether or not an over-discharge exists based on the VCC terminal voltage, in fact such a determination does not necessarily match the relation between the voltage of the secondary battery cell 1 and the residual capacity of the secondary battery cell 1. In order therefore to derive maximum usage from the secondary battery cell 1 a discharge control unit dead time circuit 12 is provided so as to continue discharging for that time set by the discharge control unit dead time circuit 12 beginning with that point in time at which over-discharge detection was carried out, after which the discharge control FET Q1 is shut OFF.
Over-current detection circuit 10 is provided mainly as short-circuit protection for the power charge/discharge path 30.
A charger or a load is connected to the +B and -B terminals. The charger/load detection circuit 13 detects whether a charger or a load is connected to the +B and -B terminals.
The over-charge detection circuit 14 detects the voltage at the VCC terminal and, if the voltage detected at the VCC terminal is less than or equal to an over-charge detection voltage V.sub.ALM off, for example, 4.2 V, maintains a state of operation. If the VCC terminal voltage exceeds an over-charge voltage V.sub.ALM the over-charge detection circuit 14 outputs an over-charge detection signal to the base of transistor TR1. As a result, the charge control FET Q2 turns OFF, stopping the charging of the secondary battery cell 1.
In order to prevent repeated starting and stopping of the charge, the over-charge detection circuit 14 is set so that a release to a normal mode, that is, a state in which there is no over-charge, is carried out at a release voltage (V.sub.P : V.sub.ALM -.DELTA.V) less than the overcharge detection voltage V.sub.ALM. That is, the over-charge detection circuit 14 has a hysteresis characteristic, in that the stopping of the charging is carried out at the over-charge detection voltage V.sub.ALM and the release to a normal mode is carried out at a release voltage (V.sub.P : V.sub.ALM -.DELTA.V) less than the overcharge detection voltage V.sub.ALM.
However, it is known that although the over-charge detection circuit 14 determines whether or not an over-charge exists based on the VCC terminal voltage, in fact such a determination does not necessarily match the relation between the voltage of the secondary battery cell 1 and the amount by which the secondary battery cell 1 has been charged. In order therefore to charge the secondary battery cell 1 fully before cutting the charge circuit a dead time setting circuit 15 is provided so as to continue charging for that time set by the dead time setting circuit 15, beginning with the point in time at which over-charge detection was carried out. The dead time of the dead time setting circuit 15 can be set to a desired time by changing the capacitor C2 connected to the TD terminal.
FIG. 2 is a diagram showing a time chart of the operation of the conventional secondary battery cell protection circuit shown in FIG. 3. The chart depicts an example in which charging of the secondary battery cell begins at a time t1 and terminates thereafter at a time t10 at which an over-discharge is detected and the discharge circuit cut off. T1-t5 represent a charge mode, during which an overcharge (V.sub.ALM) is detected at t3 and the charge control FET is turned OFF at t4. The interval t3-t4 is over-charge dead time. T5-t8 represent a discharge mode, with a load connected at t5 and an over-current detected at t6. After a dead time at t6-t7 the discharge control FET is turned OFF. Further, t8-t9 represent a charge mode during which interval charging is carried out. At t9 a load is connected and a discharge mode is entered.
However, charging is possible in the following situation, described in reference to FIG. 4:
(1) Initial charge period: t1-t4
When the charge voltage of the secondary battery cell is less than the over-charge detection voltage (V.sub.ALM) (t1-t3) and
during over-charge dead time (t3-t4) PA1 a charger voltage detection circuit detecting a charger voltage; and PA1 a first charge circuit control circuit cutting off a charge circuit when the charger voltage detection circuit detects a charger voltage in excess of a predetermined value.
(2) After over-charge detection: tp and later
After over-charge detection, when the charge voltage of the secondary battery cell is less than a release voltage (V.sub.P : V.sub.ALM -.DELTA.V) (tp and later)
At t3 an overcharge (V.sub.ALM) is detected, the charge control FET turns OFF at a dead time t4 and charging stops. Thereafter the secondary battery cell charge voltage declines due to discharge. When this charge voltage becomes a release voltage (V.sub.P : V.sub.ALM -.DELTA.V) at point P it is possible to charge during the time after tp.
(3) After over-discharge detection: t8 and later
After over-discharge detection, charging is possible during the interval given in (1) above.
However, charging during situations (1) through (3) as described above is conducted without regard to the voltage of the charger. Therefore if the charger voltage exceeds the rated voltage the discharge control FET and charge control FET connected to the charge circuit could be destroyed, as could the secondary battery cell to be charged.